Schnellste Schaltungskomponenten für Analog-Digital- und Digital-Analog-Umsetzer mit Abtastraten von über 50 GS/s basierend auf InP-DHBT-Technologie
Zusammenfassung der Projektergebnisse
In this project two analog multiplexers, three analog demultiplexer, two transimpedance amplifier and a digital-to-analog converter in InP technology are developed. The first multiplexer is realized in 1µm InP technology. It allows to build a hybrid DAC with an effective resolution between 4 bit and 5 bit at a maximum sampling rate of 50 GS/s. The bandwidth of the multiplexer is above 40 GHz. For realization of the second multiplexer a faster InP 0.25µm technology is used. Therefore, this multiplexer achieves a sampling rate of 80 GS/s, with a maximum effective resolution of 5 bit. The bandwidth of the multiplexer is above 50 GHz. The first analog demultiplexer chip is based on the multiplexer circuit. Two multiplexers are used to realize a track-and-hold circuit. The chip is realized in 1µm InP technology. Together with two ADCs a hybrid ADC can be built that achieves an effective resolution between 4 bit and 5 bit at a maximum sampling rate of 50 GS/s. The input signal attenuation is below 4 dB for input signal frequencies up to 35 GHz. The second multiplexer chip in InP technology is based on switched emitter followers, as they are known in the literature. It achieves a resolution of up to 5 bit. In general, a higher resolution can be realized with the switched emitter followers. Therefore, a redesign of this demultiplexer is implemented in the 0.25µm InP technology. Here, a maximum sampling rate of 80 GS/s, a resolution of up to 6 bit and a bandwidth above 50 GHz are achieved. As mentioned above, two transimpedance amplifiers and a digital-to-analog converter have also been developed during this project. The transimpedance amplifier in 1µm InP technology achieves a bandwidth of 45 GHz with a differential transimpedance of 70 dBOhm. It has a harmonic distortion of less than -30 dB up at a differential peak-to-peak voltage swing of 500 mV. The redesigned amplifier in 0.25µm InP technology achieves a bandwidth of 72 GHz and a transimpedance of 76 dB Ohm. The linearity has also been improved: the linear distortions are below -31 dB with a differential peak-to-peak voltage swing of 1 V. The digital-to-analog converter is implemented in 0.25µm InP technology. In simulations, an effective resolution between 4.5 bit and 5 bit is achieved at a sampling rate of 64 GS/s. This could not be verified with measurements during the project term due to the complexity of the measurement setup. However, first measurements with a pulse pattern generator show a clear PAM-4 eye at a sampling rate of 12 GS/s, hereby proving the basic functionality of the converter.
Projektbezogene Publikationen (Auswahl)
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A 25 GHz Analog Multiplexer for a 50 GS/s D/A-Conversion System in InP DHBT Technology. Compound Semiconductor Integrated Circuit Symposium (CSICS), October 2011
Damir Ferenci, Markus Grözing, Manfred Berroth
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A High Speed Linear Buffer for A/D Conversion beyond 100 GS/s in InP DHBT Technology. Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), June 2011
Damir Ferenci, Markus Grözing, Manfred Berroth
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A 25 GHz Analog Demultiplexer with a Novel Track and Hold Circuit for a 50 GS/s A/D- Conversion System in InP DHBT Technology. International Microwave Symposium (IMS), June 2012
Damir Ferenci, Markus Grözing, Manfred Berroth et al.
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A Highly Linear Transimpedance Amplifier in InP Technology for Application in 100 Gbit/s Fiber Optical Data Communication. European Microwave Integrated Circuits Conference (EuMIC), Oct 2013
Damir Ferenci, Markus Grözing, Manfred Berroth et al.
