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Generation and Optimization of Real-Time Code for Embedded Multiprocess and Multiprocessor Systems

Subject Area Computer Architecture, Embedded and Massively Parallel Systems
Term from 2011 to 2018
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 200265263
 
Many embedded systems are safety-critical real-time systems that have to meet stringent deadlines. During the design of such systems, their behavior is specified at a high abstraction level. Compilers translate these specifications into executable implementations. For single-cores and single processes, compilers have recently been extended to support real-time properties during this translation. For multiprocess- and multiprocessor-systems, compilers currently lack such a support.In the course of this project, we have proposed a couple of novel analyses to bound the interference between several processes and processors. In preemptive multiprocess-systems, the runtime of preempted tasks can grow due to cache evictions by a preempting task. We thus have designed a novel cache analysis to estimate these additional cache misses. For multiprocessor-systems, we came up with an analysis of TDMA-based buses that precisely estimates the timing of accesses to shared memory by individual processors. Overall, the first unified Worst-Case Execution Time (WCET) analysis framework for TDMA-based multiprocessors has been published.Furthermore, first compiler optimizations to reduce interferences in multiprocess-/multiprocessor-systems have been proposed by us. A first technique eliminates cache-related interferences between tasks in mixed-criticality systems. A second combined optimization considers both scheduling and memory allocation in multiprocessor-systems with heterogeneous local and shared memories.The first phase of this project focused on the WCET of single components of an entire system. This is, however, unsatisfying since in particular Worst-Case Response Times (WCRTs) and schedulability of an entire system are not considered. This aspect thus is the focus of the second project phase. Our overall goal is to improve schedulability of combined multiprocess- and multiprocessor-systems using compiler optimizations. For this purpose, we first of all investigate a formal model allowing the WCRT-oriented analysis and optimization of multiprocess-/multiprocessor-systems at compiler level.On top of this model, novel WCRT-oriented optimizations will be developed which improve schedulability of an entire system under consideration of deadlines for individual tasks. These optimizations will first be developed individually for multiprocess- and multiprocessor-systems. After that, these individual optimizations will be extended towards combined, cooperative approaches. Under consideration of the whole systems's schedulability, Pareto-optimal solutions for combined multiprocess-/multiprocessor-systems shall be found.
DFG Programme Research Grants
 
 

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