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Projekt Druckansicht

REDOX: Reduktion der Simulations- und Bestrahlungszeit von strahlungsharten Schaltungen durch Optimierung der SET Modelle

Fachliche Zuordnung Elektronische Halbleiter, Bauelemente und Schaltungen, Integrierte Systeme, Sensorik, Theoretische Elektrotechnik
Förderung Förderung von 2016 bis 2020
Projektkennung Deutsche Forschungsgemeinschaft (DFG) - Projektnummer 318876990
 
Erstellungsjahr 2021

Zusammenfassung der Projektergebnisse

The main goal of REDOX project was to enhance the characterization and modeling of SET effects in standard combinational cells. The analysis was done with electrical (SPICE) and device (TCAD) simulations, and the impact of relevant parameters considered in the design phase has been considered. Based on obtained results, we have defined a set of guidelines for the SET-aware design with the analyzed technology from IHP. In addition, we would like to emphasize the following major contributions: 1. A flow for characterization of SET generation and propagation in standard combinational cells with optimized number of simulations (number of simulations for multiple-input gates can be reduced by leveraging inherent similarities in their SET response) and reduced SET database (by storing the model coefficients in LUTs instead of raw simulation data). 2. Analytical models based on superposition principle for critical charge, amplitude-duration criterion, SET pulse width and SET propagation, enabling comprehensive analysis of the SET sensitivity in early design phases. 3. Use of decoupling cells for SET mitigation in standard combinational cells, providing better filtering capability compared to standard gate upsizing and gate duplication techniques. 4. A particle detector based on skew-sized inverters, for monitoring of particle flux and LET variations, as a support for dynamic fault tolerance. The REDOX project results have been published in two peer-reviewed journal paper and more than ten peerreviewed conference papers. The achieved results could be a basis for more efficient design of fault-tolerant radiation-aware systems. Thus, we estimate REDOX project as successful.

Projektbezogene Publikationen (Auswahl)

  • “A Critical Charge Model for Evaluation of SET and SEU Robustness – A Muller C-Element Case Study,” in Proc. 26th Asian Test Symposium (ATS), Taipei, Taiwan, 2017
    M. Andjelkovic, V. S. Veeravalli, M. Krstic, R. Kraemer, A. Steininger
    (Siehe online unter https://doi.org/10.1109/ATS.2017.27)
  • “Assessment of the Amplitude-Duration Criterion for SET and SEU Robustness Evaluation,” in Proc. 23rd International Online Testing Symposium (IOLTS), Thessaloniki, Greece, 2017
    M. Andjelkovic, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/IOLTS.2017.8046169)
  • “Comparison of the SET Sensitivity of Standard Logic Gates Designed in 130 nm CMOS Technology,” in Proc. 30th International Conference on Microelectronics (MIEL), Nis, Serbia, 2017
    M. Andjelkovic, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/MIEL.2017.8190106)
  • “Design of an On-Chip System for the SET Pulse Width Measurement,” in Proc. 20th Euromicro Conference on Digital System Design (DSD), Vienna, Austria, 2017
    M. Andjelkovic, V. Petrovic, M. Nenadovic, A. Breitenreiter, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/DSD.2017.70)
  • “Study of the Operation and SET Robustness of a CMOS Pulse Stretching Circuit,” Microelectronics Reliability, vol. 82, 2018
    M. Andjelkovic, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1016/j.microrel.2017.12.022)
  • “Use of Decoupling Cells for Mitigation of SET Effects in CMOS Combinational Gates,” in Proc. 25th International Conference on Electronic Circuits and Systems (ICECS), Bordeaux, France, 2018
    M. Andjelkovic, M. Babic, Y. Li, O. Schrape, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/ICECS.2018.8617996)
  • “A Particle Detector Based on Pulse Stretching Inverter Chain,” in Proc. 26th International Conference on Electronic Circuits and Systems (ICECS), Genova, Italy, 2019
    M. Andjelkovic, M. Veleski, J. Chen, A. Simevski, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/ICECS46596.2019.8964644)
  • “Characterization and Modeling of SET Generation Effects in CMOS Standard Logic Cells,” in Proc. 25th International Online Testing Symposium (IOLTS), Rhodes, Greece, 2019
    M. Andjelkovic, Y. Li, Z. Stamenkovic, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/IOLTS.2019.8854379)
  • “Characterization of Single Event Transient Effects in Standard Delay Cells,” in Proc. 27th International Conference on Circuits and Systems (ICECS), online, 2020
    M. Andjelkovic, O. Schrape, A. Breitenreiter, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/ICECS49266.2020.9294817)
  • “Monitoring of Particle Count Rate and LET Variations with Pulse Stretching Inverters,” IEEE Transactions on Nuclear Science, 2021
    M. Andjelkovic, J. Chen, A. Simevski, O. Schrape, M. Krstic, R. Kraemer
    (Siehe online unter https://doi.org/10.1109/TNS.2021.3076400)
 
 

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