Life time prediction for analog circuit components utilizing digital degradation monitors

• Applicant: Dr.-Ing. Dagmar Peters-Drolshagen
• Subject Area: Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
• Term: from 2018 to 2022
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 354944200

Nowadays it becomes more common to use integrated circuits within safety critical applications. This necessitates that specifications of these circuits are satisfied over the whole lifetime. However, the characteristic properties of an integrated circuit are affected by temporal changes. Physical effects in the semiconductor structures are responsible for these influences. Time dependent changes in material properties are called aging or degradation. These time dependent mechanisms cause the change in characteristic properties of an integrated circuit which may cause a malfunction of an electronic system or shorten its lifetime. In spite of several innovative solutions for the design of integrated circuits with a scope on reliability a shift in the behavior of the circuit cannot be foreclosed. The main objectives of this research proposal are new methods for measuring the conditions of degradation of analog integrated circuits. Based on the knowledge of the condition of degradation theoretical rudiments for the prediction of lifetime will be evolved. In order to achieve these two goals, measuring the degradation and lifetime prediction, a formal method based on the coefficients of adaptive filters for the determination of nominal circuit performances will be developed. Besides these nominal performances the minimal and maximal specification boundaries will be evaluated. Moreover, the time dependent change caused by aging of these performances will be determined. By observing the coefficients of an adaptive filter over time the actual state of any circuit can be determined. The continuous observation of these coefficients can be utilized to draw inferences about system failures occurring during operation. In order to build an estimation of the degradation of microelectronic circuits on this basis the parasitic influences on the circuit have to be measured in a way that these effects are subsequently distinguishable. Therefore, multi sensor interfaces are built in the project to determine die PVTinfluences. With the knowledge of the nominal circuit performances, the actual state of the system, and the PVT-influences methods to determine the degradation of a circuit can be developed. The therewith derived degradation state represents the origin for the development of enhanced methods for the lifetime prediction of integrated circuits. In this project these methods will be exemplarily realized involving first theoretical approaches.

• DFG Programme: Research Grants
• Co-Investigator: Professor Dr.-Ing. Steffen Paul