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Bendable wireless sensors and millimetre-wave transmitters using thinned SiGe BiCMOS Acronym: Bend-IT

Subject Area Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Term from 2017 to 2021
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 356463945
 
Final Report Year 2021

Final Report Abstract

In this research project, bendable wireless transmitters, fabrication techniques and circuits have been investigated. The focus of the project was to study the behavior of mm-wave circuits which are fabricated in a standard state-of-the-art technology after aggressive thinning to enable the bending of these chips. A transmitter system, consisting of a 190 GHz voltage-controlled oscillator, two buffering power amplifiers as well as a folded dipole antenna array was devised. The power amplifier as well as the antenna were especially designed for this system. All circuit blocks are interconnected by passive electromagnetic baluns. This architecture includes all high frequency building blocks on chip resulting in a fully self-contained system which only requires DC power supplied. The manufacturing of the circuit is based on the state-of-the-art IHP SG13 BiCMOS process. An advanced finite element model is designed in ANSYS 18.2 and validated by both analytical equations and measurements to characterize the in-plane stress induced wafer deformation. The model includes most of the fabrication details and is highly simplified as well using the first order shear deformation theory. It features a high accuracy in comparison with the measurement results. The material residual stresses resulted from each back-end process step is extracted based on the derived model. Besides, the wafer deformation variation corresponded to different wafer thicknesses, as well as the gravity induced deformation are both characterized using this model. Extensive effort was put in the characterization of the system. The transistor DC behaviors are compared and analyzed before and after the wafer thinning to provide information for the circuit characterization. As for the circuit characterization, the standard thickness chips were measured and analyzed firstly to provide a reference point of the performance. Next, the chips, thinned down to 20 μm total thickness, were characterized. This included the measurement of the ultra-thin chips (UTC) without the antenna on the wafer prober and was completed by attaching and bonding the devices to a semi-rigid bendable PCB as a chip carrier enabling, combined with custom 3D printed fixtures, the characterization in a bend state. Finally, the antenna pattern was studied by means of a specifically build measurement setup and compared against theoretical electromagnetic simulation. The measurements results prove that the circuit operate at millimeter-wave frequencies with reasonable performance after thinning. The overall output power was decreased by a maximum of 8 dB while the oscillation frequency of the VCO under bending stress shifted by only 1 % around 186.5 GHz. Further improvements in the fabrication of thinned chips will even better align the performance of standard thickness and thinned chips by further limiting the damages to the chips in production.

Publications

  • "An Integrated mm-Wave Quadrature Up-Conversion Mixer Based on a Six-Port Modulator,” in 2019 14th European Microwave Integrated Circuits Conference (EuMIC), 2019, pp. 176–179
    V. Rieß, P. Stärke, C. Carta, and F. Ellinger
    (See online at https://doi.org/10.23919/eumic.2019.8909459)
  • “A mm-Wave Quadrature Down-Conversion Mixer Based on a Six-Port Junction in 130-nm SiGe BiCMOS,” in 2019 IEEE MTT-S International Microwave Symposium (IMS), 2019, pp. 232–235
    V. Rieß, D. Fritsche, P. Stärke, C. Carta, and F. Ellinger
    (See online at https://doi.org/10.1109/mwsym.2019.8700739)
  • „Finite-element modelling of stress induced wafer warpage for a full BiCMOS process,“ in 2019 IEEE 19th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), Orlando, FL, USA, 2019
    Z. Cao, A. Goeritz, M. Wietstruck, S. T. Wipf, A. Trusch und M. Kaynak
    (See online at https://doi.org/10.1109/sirf.2019.8709125)
  • “A 3-Bit DAC With Gray Coding for 100-Gbit/s PAM Signal Generation,” in 2020 IEEE/MTT-S International Microwave Symposium (IMS), 2020, pp. 201–204
    V. Rieß, P. Stärke, M. M. Khafaji, C. Carta, and F. Ellinger
    (See online at https://doi.org/10.1109/ims30576.2020.9224093)
  • “An Integrated 16-Element Phased-Array Transmitter Front-End for Wireless Communication at 185 GHz,” in 2020 German Microwave Conference (GeMiC), 2020, pp. 136–139
    V. Rieß et al.
  • "A 130 nm-SiGe-BiCMOS Low-Power Receiver Based on Distributed Amplifier Techniques for Broadband Applications From 140 GHz to 200 GHz," in IEEE Open Journal of Circuits and Systems, 2021
    P. V. Testa, V. Riess, C. Carta and F. Ellinger
    (See online at https://doi.org/10.1109/ojcas.2021.3103604)
  • “A 130 nm-SiGe-BiCMOS Low-Power Receiver Based on Distributed Amplifier Techniques for Broadband Applications From 140 GHz to 200 GHz,” IEEE Open J. Circuits Syst., vol. 2, pp. 508–519, 2021
    P. V Testa, V. Riess, C. Carta, and F. Ellinger
    (See online at https://doi.org/10.1109/ojcas.2021.3103604)
  • „An Advanced Finite Element Model for BiCMOS Process Oriented Ultra-thin Wafer Deformation,“ IEEE Transactions on Semiconductor Manufacturing, 2021
    Z. Cao, A. Goeritz, M. Stocchi, M. Wietstruck, C. Hoyer, L. D. Steinweg, C. Carta, F. Ellinger, B. Tillack und M. Kayna
    (See online at https://doi.org/10.1109/tsm.2021.3132550)
 
 

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