Security for Internet of Things with Low Energy and Low Power Consumption (GreenSec)
Computer Architecture, Embedded and Massively Parallel Systems
Final Report Abstract
The goal of this project was to design efficient and secure cryptographic implementations for constrained devices, i.e., battery-driven IoT devices or those that are powered through an RFID-field. We investigated various existing schemes and analysed the influence of specific properties on the energy consumption. This helped us to determine, which kinds of implementations are suitable for small devices that aim for thorough physical security. We showed that parallel implementations are to favour over serial implementations and the energy consumption increases with the masking order. For our approach, we did not optimize a whole implementation by itself, but considered smaller, atomic gates and made them provable secure in an efficient way. For example, we focused on masking a single AND gate, which can then be combined to build whole ciphers. With our automatic tools, a designer without expertise in the field of implementation security can easily compose several of those so-called gadgets and ganerate a provable secure cryptographic implementation. The gadgets are optimized for different purposes, being either low-latency, low-area or low-randomness requirements. This allows a designer to simply adapt his desired unprotected implementation to one, that fulfils his requirements. We determined some lightweight ciphers, which are a suitable starting point for efficient implementations, e.g., MIDORI or PRINCE.
Publications
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Lightweight Ciphers on a 65 nm ASIC A Comparative Study on Energy Consumption. 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 530-535. IEEE.
Richter, Bastian & Moradi, Amir
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SILVER – Statistical Independence and Leakage Verification. Lecture Notes in Computer Science, 787-816. Springer International Publishing.
Knichel, David; Sasdrich, Pascal & Moradi, Amir
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Automated Generation of Masked Hardware. IACR Transactions on Cryptographic Hardware and Embedded Systems, 589-629.
Knichel, David; Moradi, Amir; Müller, Nicolai & Sasdrich, Pascal
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Generic Hardware Private Circuits. IACR Transactions on Cryptographic Hardware and Embedded Systems, 323-344.
Knichel, David; Sasdrich, Pascal & Moradi, Amir
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Composable Gadgets with Reused Fresh Masks. IACR Transactions on Cryptographic Hardware and Embedded Systems, 114-140.
Knichel, David & Moradi, Amir
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Low-Latency Hardware Private Circuits. Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 1799-1812. ACM.
Knichel, David & Moradi, Amir
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Randomness Optimization for Gadget Compositions in Higher-Order Masking. IACR Transactions on Cryptographic Hardware and Embedded Systems, 188-227.
Feldtkeller, Jakob; Knichel, David; Sasdrich, Pascal; Moradi, Amir & Güneysu, Tim
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Energy Consumption of Protected Cryptographic Hardware Cores. Lecture Notes in Computer Science, 195-220. Springer Nature Switzerland.
Rezaei, Shahmirzadi Aein; Moos, Thorben & Moradi, Amir
