Fast and Accurate Design Methodologies using Fully Event-Driven Simulations for non-ideal Mixed-Signal Systems
Final Report Abstract
The FastSim-MS project deals with methods for fast and accurate design and simulation techniques for nonideal mixed-signal systems using fully event-driven simulations combined with transistor-level characterized subsystems. To achieve this, the existing expertise in the field of very fast and efficient phase-locked loop (PLL) simulation was modularly extended in order to be applied to other typical mixed-signal systems, such as the DLL or CDR topologies. This effort resulted in the creation of the very fast simulation tool called EDAMS, which features a user-friendly GUI and a bottom-up interface to transistor-level characterisations. To enable partial automation in the co-design process, the University of Paderborn closely collaborated with their project partner, the University of Aix-Marseille, and integrated the developed simulation method into their transistor-level design process. For this purpose, the EDAMS tool was equipped with an exchange interface that allows engineers to integrate the most significant non-ideal and nonlinear effects from the world of transistors into fully event-driven simulations, achieving high speed, minimal system parameter requirements, and realistic and accurate behavioural simulation of the mixed-signal system. This has been demonstrated and published using a CP-PLL example in 130 nm CMOS technology. The co-simulation method developed within the Sim project empowers researchers to attain a deeper comprehension of the intricate behaviour of mixed-signal systems. This comprehension plays a pivotal role in enhancing the design of these systems and considerably expediting the development process. The insights and acquired methodologies has been disseminated through a conference tutorial with the target of helping engineers in the domain of the system-level design of mixed-signal systems.
Publications
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System-Level considerations for the modelling, the design and the characterization of PLL-Devices. Tutorial presented in: 19th IEEE Interregional NEWCAS Conference 2021 – June 13-16, 2021
Hedayat, C.; Kaufmann, I.; Hangmann, C.; Hilleringmann, U. & Deutschmann, P.
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Efficient Co-Design Methodology combinig Fast and Accurate System-level Simulations with Transistor-level Characterization. 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 1-4. IEEE.
Guerin, Mathieu; Haddad, Fayrouz; Sazzad, Md-Hossain; Kaufmann, Ivan; Hedayat, Christian; Rahajandraibe, Wenceslas; Vauché, Rémy & Hilleringmann, Ulrich
