SymmetriC CiphEr design with inherent phySical Security (SuCCESS)
Theoretical Computer Science
Final Report Abstract
The goal of this project was to design efficient and secure symmetric cryptographic primitives, considering countermeasures against physical attacks. As a result, we introduced three different block ciphers, each optimized for specific applications. The first block cipher, CRAFT, is optimized to provide protection against fault-injection attacks with minimal overhead. Next, we introduced SPOOK, designed to offer security against side-channel attacks at a low energy cost. SPEEDY is the last block cipher, an ultra-low-latency block cipher designed for use in secure caches or other applications requiring high-speed encryption. In the next step, taking CRAFT into account, we proposed several methodologies to provide protection against fault-injection attacks based on linear codes. Additionally, we provided a tool to verify the security of a design against fault-injection attacks under different attacker models. We also introduced novel techniques to reduce the overall cost of masking schemes in hardware platforms, particularly in terms of fresh randomness and latency, measured in the number of clock cycles.
Publications
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CRAFT: lightweight tweakable block cipher with efficient protection against DFA attacks. IACR Trans. Symmetric Cryptol., 2019(1):5– 45, 2019
C. Beierle, G. Leander, A. Moradi & S. Rasoolzadeh
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Impeccable Circuits II. 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6. IEEE.
Shahmirzadi, Aein Rezaei; Rasoolzadeh, Shahram & Moradi, Amir
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Re-Consolidating First-Order Masking Schemes. IACR Transactions on Cryptographic Hardware and Embedded Systems, 305-342.
Rezaei, Shahmirzadi Aein & Moradi, Amir
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Spongebased leakage-resistant authenticated encryption with a masked tweakable block cipher. IACR Trans. Symmetric Cryptol., 2020(S1):295–349, 2020.
D. Bellizia, F. Berti, O. Bronchain, G. Cassiers, S. Duval, C. Guo, G. Leander, G. Leurent, I. Levi, C. Momin, O. Pereira, T. Peters, F. Standaert, B. Udvarhelyi & F. Wiemer
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Cryptanalysis of Efficient Masked Ciphers: Applications to Low Latency. IACR Transactions on Cryptographic Hardware and Embedded Systems, 679-721.
Beyne, Tim; Dhooghe, Siemen; Moradi, Amir & Rezaei, Shahmirzadi Aein
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Impeccable Circuits III. 2021 IEEE International Test Conference (ITC), 163-169. IEEE.
Rasoolzadeh, Shahram; Shahmirzadi, Aein Rezaei & Moradi, Amir
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Second-Order SCA Security with almost no Fresh Randomness. IACR Transactions on Cryptographic Hardware and Embedded Systems, 708-755.
Rezaei, Shahmirzadi Aein & Moradi, Amir
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The SPEEDY Family of Block Ciphers. IACR Transactions on Cryptographic Hardware and Embedded Systems, 510-545.
Leander, Gregor; Moos, Thorben; Moradi, Amir & Rasoolzadeh, Shahram
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Low-Latency and Low-Randomness Second-Order Masked Cubic Functions. IACR Transactions on Cryptographic Hardware and Embedded Systems, 113-152.
Rezaei, Shahmirzadi Aein; Dhooghe, Siemen & Moradi, Amir
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Second-Order Low-Randomness d + 1 Hardware Sharing of the AES. Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 815-828. ACM.
Dhooghe, Siemen; Shahmirzadi, Aein Rezaei & Moradi, Amir
