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Hybrid graphene/III-V system selectively grown on Si nanotips: A correlation study of structural and optoelectronic properties

Subject Area Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Synthesis and Properties of Functional Materials
Term since 2020
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 428250328
 
Monolithic growth of group III-V semiconductors with their superior optoelectronic properties on Si is a sophisticated solution for the integration of III-V devices into mature Si technology and CMOS platforms. In spite of large efforts for the III-V/Si epitaxy over the last decades, the growth of high quality, low-defect density III-V materials on Si remains a challenge due to the heterogeneous material properties, such as lattice spacing, symmetries of the crystals, surface energy, and thermal-expansion coefficients. An alternative epitaxial approach for selective growth of III-V compounds on patterned Si nanostructures has been reported, realizing high-quality heterostructures. Known under the name nanoheteroepitaxy, this approach reduces plastic relaxation via dividing the strain energy between the III-V layer and the underlying Si structures, allows better control of the III-V quantum structures position and suppressing contamination segregation. Our project will, hence, investigate the use of the nanoheteroepitaxy method for the monolithic growth of III-V quantum structures on patterned Si wafers. There, we will first focus on studying III-V on Si growth kinetics, defect formation mechanisms and optoelectronic properties of III-V material on Si-nanostructures as well as the influence of the strain engineering on the compliance effect in nanoheteroepitaxy. In order to have a broad range for tailoring the strain and the optoelectronic properties of III-V material, we propose to grow GaxIn1-xP buffer layers on Si nanotips (x between 1 and 0 results in 0.3%8% lattice mismatch and a Eg between 2.3 and 1.3 eV), and to use strain-engineered quantum wells and dots embedded in the buffer layer as active electron-hole recombination channels. Graphene (Gr) will be later used as electrical top contact, which is beneficial for the device performance due to its high optical transparency and electrical transport qualities. The structural properties of graphene after transfer onto the III-V/Si and particularly, the defects at the Gr/III-V interface and the charge transfer will be investigated. Our attempt will be accompanied by research for precise material control using combined growth and epitaxial techniques, and correlated structural and optoelectronic characterization on ensemble of quantum light emitters as well as on single III-V nano islands. The proposed approach delivers solution possibilities for challenges such as III-V/Si high-defects density, which is detrimental to optoelectronic devices, the QDs site control and the contamination of III-V during monolithic growth on Si. Our approach brings freedom in tailoring the III-V material and leads to a myriad of opportunities and challenges to investigating III-V/Si selective growth, studying strain and bandgap tuning by extending the III-V spectra, gaining knowledge on III-V/Gr interface, and approaching efficient and tunable light emitters on the Si platform for integrated optoelectronics.
DFG Programme Research Grants
International Connection China, France
 
 

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