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Room-temperature broadband MIR photodetector based on Si:Te for wafer-scale integration

Applicant Dr. Shengqiang Zhou, since 4/2022
Subject Area Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Experimental Condensed Matter Physics
Term since 2020
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 445049905
 
Room-temperature broadband infrared photoresponse in Si is of great interest for the development of on-chip CMOS-compatible photonic platforms. Prototype Si-based photodetectors by utilizing deep-level impurities via ion implantation and pulsed laser melting have shown sub-bandgap photoresponse at room-temperature. However, the critical issues concerning the performance of photodetectors have not been addressed, including the specific detectivity (D*), the noise equivalent power, and the response speed. Most importantly, the missing scalability of pulsed laser melting inhibits both the industry application and the wafer-scale integration of the resulting Si-based photodetectors. In this proposal, we will realize the solid phase epitaxial growth of Si:Te layers and the optimization of room-temperature Si:Te MIR photodetectors for wafer-scale integration via an industry-compatible approach of combining ion implantation and flash lamp annealing. Different from pulsed laser melting, flash lamp annealing allows for the preparation of wafer-scale MIR photodetector arrays and the scalability for industry applications. The p-type Si substrate will be implanted with Te ions, then subsequently annealed for the restoration of the as-implanted layer and the activation of Te dopants in Si by ms-range flash lamp annealing. All the parameters of the synthesis process will be fine-tuned to obtain high quality single-crystalline Si:Te layers. Based on the optimized materials, prototype Si:Te MIR photodetectors will fabricated. Their electrical (dark current) and optical (EQE, D* and noise equivalent power) characteristics as well as the competitiveness with the commercial products will be investigated and optimized. As a result, Si:Te photodetector arrays on wafer-scale Si substrate for photodetection at MIR will be attempted for the integration of CMOS photonics.
DFG Programme Research Grants
Ehemalige Antragstellerin Dr. Mao Wang, until 4/2022
 
 

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