Combining Testing and Monitoring for Online Functional Guarantees in Imprecise Hardware Systems

• Applicants: Professor Dr.-Ing. Görschwin Fey; Professor Dr. Alberto Garcia-Ortiz
• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems
• Term: since 2021
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 471837173

Two forces are shaping the design of new digital systems: variability and approximation. As technology scales, the variability of devices and interconnects increases dramatically due to intrinsic (e.g., unequal dopant concentrations) and extrinsic (e.g., temperature variations) factors. Furthermore, devices degrade over time -the so-called aging- which exacerbates the variability problem. To palliate these issues, new design methodologies proposed to accept an "imprecise" functionality at some parts of the design and during some periods of time. Thus, errors are becoming an integral part of the design flow. The "imprecise" functionality appears in two fundamentally different flavors: either it is due to the unavoidable variability of the technology which is addressed with additional logic -the so-called stochastic processing- or it is created by design to reduce area or energy consumption of the system -the so-called approximate processing. These two characteristics will play an essential role when considering future systems, e.g., enhancing the infrastructure for the Internet of Things (IoT) and creating multiprocessor systems for high-performance computing.Currently, it is not possible to quantify the accuracy-warranties of an imprecise processing system reliably at run time when it includes imprecise hardware subject to aging and environmental changes. Consequently, safely deploying adaptable systems that use functional approximation and that are implemented in new variability-prone technologies is difficult. Our main goal is to overcome this problem by developing new concepts for the first run-time diagnostic infrastructure for imprecise circuits that provides functional guarantees. We want to achieve this by combining new algorithms for generation and synthesis of stimuli-based testing tightly joined with new hardware building blocks for monitoring functionality of a system at run time. We will validate our design tools and methodology on a Vision-System-on-Chip.

• DFG Programme: Research Grants