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Exploring Efficient and Robust Optical Accelerators for Neural Networks

Subject Area Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Term since 2022
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 497488621
 
In recent years, deep neural networks (DNNs) have achieved remarkable breakthroughs. This advance, however, is accompanied by a rapid increase of the number of network layers and computation operations in DNNs. To overcome the bottleneck of computational performance, optical multiply­-and-­accumulate (OMAC) modules based on silicon-photonic components have been implemented as optical accelerators for neural networks with light as the computation media. Existing research on OMAC design, however, is still restricted to accelerating neural networks of small sizes and simple structures, and thus of limited computational capability. Solutions to address the challenges from efficiency to robustness in applying OMAC modules to accelerate large neural networks are still missing. In this project, we aim to investigate the systematic design of neural network acceleration with OMAC modules to enhance hardware efficiency, computation accuracy, and robustness under hardware uncertainties. First, the mapping of computation operations in neural networks onto OMAC modules will be investigated, in which the sizes of OMAC modules and thus the overall resource usage can be reduced. In addition, general OMAC-based acceleration architectures will be explored to process multiple neural networks efficiently, with the internal structures of OMAC modules enhanced by design space exploration. To improve computational efficiency and reduce area further, data representation in light signals will be examined to embed data into both the amplitudes and the phases of light signals simultaneously. The robustness of OMAC modules under process variations, noise, and thermal effects will also be strengthened by deploying ensemble learning and architectural enhancement. The resulting OMAC design will allow efficient test of internal signals and become resilient to hardware uncertainties and faults for accelerating DNNs.
DFG Programme Research Grants
International Connection Switzerland
Cooperation Partner Dr. Bert Jan Offrein
 
 

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