SMAUG: System-Level Modeling and Optimized Use of Disruptive Memory Technologies

• Applicant: Professor Dr.-Ing. Olaf Spinczyk
• Subject Area: Security and Dependability, Operating-, Communication- and Distributed Systems
• Term: since 2022
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 502565817

Besides the processing units, main memory is the most important resource in a computer system without which data processing would be de facto impossible. Various types of random access memory (RAM) have been used as main memory for several decades. RAM technology is under continuous development and, thus, got larger capacities, lower access latencies and higher data rates, but the basic properties of the main memory remained unchanged. It is traditionally homogeneous and byte-addressable. Memory contents are volatile, i.e. they are lost when the device is switched off. In addition, it is passive, i.e. it cannot process data independently. These typical properties are now firmly anchored in the expectations of software developers and manifest themselves in their products accordingly. We are now seeing a wave of innovations in memory technologies that defeat these assumptions. In this sense they are “disruptive” for the entire software industry and computer science. Examples of this are UPMEM PIM (“Near-Memory Computing” / NMC: main memory becomes active) or NVRAM (non-volatile, with special performance characteristics). In addition, there are technologies such as high-bandwidth memory (HBM) and extremely fast networks that allow for “memory disaggregation” or direct memory access across computer boundaries (CXL, RDMA). Taken together, these innovations promise systems with higher processing power, lower energy consumption, more reliability and cost reductions. However, it is still largely unclear how complex platforms that integrate several of these technologies can be used in an optimized manner by future application and system software. This project is intended to remedy this. Having built hardware component, topology, and software behavior models in the first funding period, the second period focuses on utilizing those for developing optimized resource management strategies. This way, bottlenecks, resource under-utilization, and interference between applications are to be avoided by means of model-guided and performance-aware resource partitioning across applications as well as placement of application-specific control flows and data. Additionally, the second funding period covers transfer learning so as to adjust existing models to minor hardware or software changes with a minimal amount of additional (time-intensive) benchmarks.

• DFG Programme: Priority Programmes
• Subproject of: SPP 2377: Disruptive Main-Memory Technologies
• Co-Investigator: Dr. Birte Friesel