Project Details
Projekt
SSIMA – Scalable Side-Channel Immune Micro-Architecture
Applicant
Professor Dr. Amir Moradi
Subject Area
Security and Dependability, Operating-, Communication- and Distributed Systems
Term
since 2024
Project identifier
Deutsche Forschungsgemeinschaft (DFG) - Project number 535533866
This research focuses on addressing the limitations of current embedded micro-architectures in providing comprehensive protection against combined passive and active physical attacks, such as side-channel analysis (SCA) and fault injection (FI). The objective is to explore the construction of composable architectures that can maintain security against these attacks in a combined setting. The study aims to achieve scalability in constructing these architectures, allowing for SCA security at arbitrary orders using a single hardware design. The primary objective is to develop methodologies for scalable physically secure software using customized embedded platforms without micro-architectural leakage. Scalability involves adapting implementations to different adversary models and fault tolerance requirements while maintaining theoretical and practical security guarantees. It is planned to design and develop a RISC-V platform, including the corresponding instruction set architecture (ISA) and dedicated Instruction Set Extensions (ISE), that enables software designers to effortlessly convert unprotected software written in high-level languages (e.g., C) into machine code for the developed platform. The resulting implementation should provide security against defined adversaries while upholding theoretical security arguments in practice. The successful outcome would represent a significant advancement in the development of ISAs with provable security for executing arbitrary software.
DFG Programme
Priority Programmes
