PIMcoDB: Computer and Database Architectures for host-based Processing-In-Memory on Hybrid Memory

• Applicants: Professor Dr.-Ing. Andreas Koch; Professor Dr.-Ing. Ilia Petrov
• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems ; Data Management, Data-Intensive Systems, Computer Science Methods in Business Informatics
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 566307757

With the advances in semiconductor technologies, it has nowadays become economical to produce combinations of modern semiconductor storage (e.g., stacked volatile, non-volatile, or hybrid memories) and powerful compute-units co-located on, or close to, the same chip - yielding “intelligent” storage devices. In times of exponential data growth, the movement of data between storage and processing has become a limiting factor since it is blocking, frequent, and impairs scalability. Existing solutions are mainly based on seven decades old architectures, mandating the movement of data to the processing elements (and back, if results were computed). This procedure carries severe time and energy penalties. We aim to investigate the holistic impact of Processing-In-Memory with hybrid memory technologies, combined with flexibly programmable and high-efficiency hardwired compute units, on modern computer architectures and the end-to-end software stack. We will especially focus on the scalability of the solution beyond the state-of-the-art (e.g., as provided by UPMEM or Samsung), by considering communication topologies and mechanisms at the chip, DIMM, and host levels. pimCoDB research thus aims to investigate the following aspects: (1) the impact of PIM on computer and data-processing architectures in host-PIM settings, where PIM-capable memories are used as replacement current passive RAM, yielding massive compute resources. (2) non- and basic configurable Cache-Coherent (n/cCC) PIM systems, to address the massive numbers of PCUs in host-PIM settings as existing cache-coherence approaches will not scale. (3) novel data-centric, post-Moore DBMS architectures that treat PIM as a first- class citizen in scalable systems PIM-systems, and novel update-aware PIM design allowing read-only PIM operations to execute with transactional guarantees in an nCC system, in presence of concurrent Host-CPU-side modifications.

• DFG Programme: Research Grants