MOTARO: A modular approach for test and repair of embedded non-volatile memories.
Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Final Report Abstract
The main driving force of the research conducted was addressing reliability challenges of existing and emerging NVMs implemented in embedded systems. This was achieved by developing novel memory repair techniques that enable wider adoption of NVMs in digital systems. Each investigated technique focuses on different reliability aspects of NVMs, i.e.: Word-level repair provides on-line repair of wear-out memory cells that can occur during memory lifetime. - Block-level repair focuses on post-production faults in the memory array. - Error-correcting code with increased hard error correction capability provides protection against hard faults that can occur in the memory array and soft errors caused e.g., by external factors. - Software-based program adaptation techniques allow to reuse faulty program memories for storing program code. - Configuration data protection mechanism based on N-modular redundancy allows to reliably store important data even in the corrupted memory areas. All proposed techniques were evaluated, and their repair capabilities measured. Moreover, it was shown that by combining the proposed techniques into a consistent system significantly improved memory repair can be achieved. The applicability of the investigated mechanisms for embedded systems was proven through system emulations. In addition, hardware-based techniques were implemented in ASIC resulting in 186 produced chips. In order to focus entirely on the memory repair aspect we abandoned aspects related to memory built-in self-test mechanisms.
Publications
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“ECC with Increased Hard Error Correction Capability for Memory Reliability Improvement”, Non-Volatile Memory Technology Symposium (NVMTS) 2014, Jeju, October 27 - November 29, 2014, Korea
P. Skoncej
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“Investigation of Methods for Increasing the Reliability of Highly Integrated Non-volatile Memories on System Level”, BTU Cottbus-Senftenberg, Cottbus, (2014)
P. Skoncej
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“Low-Overhead Fault Injection Simulation and Emulation Technique for Embedded Memories”, ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ), Bad Staffelstein, February 23 - 25, 2014, Germany
P. Skoncej
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“Softwarebasierte Selbstreparatur von Flash-Speichern für fehlertolerante mikrocontroller-basierte Systeme” Workshop für Fehlertolerante und energieeffiziente eingebettete Systeme: Methoden und Anwendungen, Cottbus, October 01, 2015, Germany
P. Skoncej, F. Mühlbauer, M. Schölzel
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„On the Feasibility of Handling Manufacturing Faults in Embedded Memories by Software Means” IEEE International Workshop of Electronics, Control, Measurement, Signals and their application to Mechatronics, Liberec, June 22 - 24, 2015, Czech Republic
M. Schölzel, P. Skoncej, F. Vater
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„Software-based Repair for Memories in Tiny Embedded Systems” European Test Symposium (ETS), Cluj-Napoca, May 25 - 29, 2015, Romania
M. Schölzel, P. Skoncej, F. Vater
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“Feasibility of Software-based Repair for Program Memories” 22nd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2016), Sant Feliu de Guixols, Catalunya, July 04 - 06, 2016, Spain
P. Skoncej, F. Mühlbauer, F. Kubicek, L. Schröder, M. Schölzel
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“Protecting Flash Memory Areas Against Memory Faults in Tiny Embedded Systems” 15th Biennial Baltic Electronics Conference (BEC 2016), Tallinn, October 03 - 05, 2016, Estonia – Best paper award
P. Skoncej
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„Softwarebasierte Fehlertoleranz für Flash-Speicher von mikrocontroller-basierten Systemen” ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2016), Siegen, March 06 - 08, 2016, Germany
F. Mühlbauer, P. Skoncej, M. Schölzel
