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Dual Quantization DAC for High-Linearity Multibit Continuous-Time Sigma-Delta Modulators - DuQDAC

Subject Area Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering
Term since 2020
Project identifier Deutsche Forschungsgemeinschaft (DFG) - Project number 433735880
 
Continuous-time sigma-delta modulators (SDMs) are the dominant architecture for achieving medium to high conversion rates with high resolution and linearity. They are majorly used in wireless 4G and 5G receivers as well as in radar applications in the state of the art. In most cases, internally multibit quantized SDMs are used, since they can work with low sampling rates, have superior stability, properties, and have predominantly reduced requirements for circuit non-idealities. However, this does not apply to the external feedback digital-to-analog converter (DAC). This DAC must - although realized with low resolution - meet the highest linearity requirements.In contrast, 1-bit DACs would be intrinsically linear, but apart from that, 1-bit SDMs have predominantly poor properties for wideband ADCs.The goal of the project is to advantageously combine these two properties in a new architecture. For this purpose, the multibit output signal of the SDM is fed into a sigma delta DAC in the feedback path of the main SDM, which converts the multibit into a 1-bit signal. By appropriate choice of the SD-DAC architecture, the resulting quantization error is eliminated again and the stability properties of the SDM are retained.
DFG Programme Research Grants
 
 

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