Reconfigurable Architecture (B07)

• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 528378584

The possibility to reconfigure functionalities at runtime is a very good option to further improve the performance, flexibility and circuit complexity without increasing the device count. While A05 explores device level reconfigurability and B01 explores flexible wiring this project will specifically enable a portfolio of new reconfiguration schemes. Not only will we see new functionalities such as flexible and programmable routing but we will also be able to reconfigure circuits in three rather than two dimensions. The role of this project is to explore suitable architectures to fulfill this essential task including but not limited to the reconfiguration options of the devices from A05 and B01.

• DFG Programme: CRC/Transregios
• Subproject of: TRR 404: Next Generation Electronics with Active Devices in Three Dimensions (Active-3D)
• Applicant Institution: Technische Universität Dresden
• Co-Applicant Institution: Rheinisch-Westfälische Technische Hochschule Aachen
• Project Heads: Professor Dr.-Ing. Tobias Gemmeke; Professorin Dr.-Ing. Diana Goehringer