PHY-FEC Mixed-Signal Processor for High-Speed PCB Links

• Applicant: Dr.-Ing. Lukasz Lopacinski
• Subject Area: Hardware Systems and Architectures for Information Technology and Artificial Intelligence, Quantum Engineering Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering ; Communication Technology and Networks, High-Frequency Technology and Photonic Systems, Signal Processing and Machine Learning for Information Technology
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 562441629

We propose research on SNR improvement at the algorithmic level for PCB links and high-speed serial transceivers with spectral efficiency above 2 b/s/Hz. We will investigate the methods to improve the effective SNR and the resulting BER by adding a modern hybrid automatic repeat request (HARQ) and forward error correction (FEC) mechanisms in the data link layer (DLL), which will be directly realized in the high-speed transceiver hardware. In this proposal, we focus on algorithmic improvements which can be easily integrated into the PHY-hardware and protocols.

• DFG Programme: Research Grants
• Co-Investigator: Professor Dr.-Ing. Milos Krstic