ECAT: Enabling Computer Architecture for Tomorrow

• Applicants: Professor Dr.-Ing. Jeronimo Castrillon-Mazo; Professor Dr. Nima TaheriNejad
• Subject Area: Computer Architecture, Embedded and Massively Parallel Systems ; Electronic Semiconductors, Components and Circuits, Integrated Systems, Sensor Technology, Theoretical Electrical Engineering ; Hardware Systems and Architectures for Information Technology and Artificial Intelligence, Quantum Engineering Systems
• Term: since 2025
• Project identifier: Deutsche Forschungsgemeinschaft (DFG) - Project number 569133238

Computing architectures of today face several limitations such as high(static) power consumption, insufficient computing speed, reduced reliability, high cost, and scaling issues. Meanwhile, the demand for performance and energy efficiency continues to increase. To overcome the limitations of the computer architectures of today, future computing systems should exploit both emerging technologies and novel computing paradigms, leading to efficient heterogeneous architectures. Considering the technology, circuit, and architecture variety, the overall design space for the computer architecture of tomorrow is immense; selecting computation units, along with their implementation, and mapping applications on these heterogeneous architectures is a very complex task. Although the literature is rich with attempts to propose new computation units, methodologies, and architectures, a systematic and comprehensive approach to efficiently explore different possible architectures and fairly compare different solutions in a reasonable timeframe is still missing. ECAT aims to address this gap by providing an open-source full-stack ecosystem to study computer architectures of tomorrow, exploiting in-memory, near-memory, and approximate computing paradigms in the light of emerging technologies. To that end, new models, methodologies and frameworks are required for exploring and evaluating these novel heterogeneous computer architectures. ECAT addresses this need by researching and developing configurable device-, component- and system-level models, along with the appropriate programming model interfaces, and a complete system-level simulator. Device- and component-level models of different Computing Elements (CEs) will be abstracted from the underlying technology, enabling system-level integration. Programming model interfaces allow the generation of application code to be deployed on the CEs. A system-level simulator will be the key to evaluating the benefits of running a given application on the target heterogeneous computing architecture in terms of energy, accuracy, and performance. The ECAT ecosystem will enable fast and trustworthy design space exploration of future heterogeneous computing systems of tomorrow.

• DFG Programme: Research Grants
• International Connection: France
• Cooperation Partners: Professor Alberto Bosio, Ph.D.; Professor Dr. Olivier Sentieys